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bts 612 n1 semiconductor group 1 smart two channel highside power switch features overload protection current limitation short circuit protection thermal shutdown overvoltage protection (including load dump) fast demagnetization of inductive loads reverse battery protection 1 ) undervoltage and overvoltage shutdown with auto-restart and hysteresis open drain diagnostic output open load detection in off-state cmos compatible input loss of ground and loss of v bb protection e lectro s tatic d ischarge ( esd ) protection application m c compatible power switch with diagnostic feedback for 12 v and 24 v dc grounded loads all types of resistive, inductive and capacitve loads replaces electromechanical relays, fuses and discrete circuits general description n channel vertical power fet with charge pump, ground referenced cmos compatible input and diagnostic feedback, monolithically integrated in smart sipmos a technology. fully protected by embedded protection functions. + v bb in1 st signal gnd esd profet a out1 gnd logic voltage sensor voltage source open load detection 1 short to vbb level shifter temperature sensor 1 rectifier 1 limit for unclamped ind. loads 1 gate 1 protection current limit 1 3 5 2 4 1 load gnd load v logic overvoltage protection out2 open load detection 2 short to vbb level shifter temperature sensor 2 rectifier 2 limit for unclamped ind. loads 2 gate 2 protection current limit 2 7 in2 6 charge pump 1 charge pump 2 1 ) with external current limit (e.g. resistor r gnd =150 w ) in gnd connection, resistor in series with st connection, reverse load current limited by connected load. product summary overvoltage protection v bb ( az ) 43 v operating voltage v bb ( on ) 5.0 ... 34 v channels: each both parallel on-state resistance r on 200 100 m w load current (iso) i l ( iso ) 2.3 4.4 a current limitation i l ( scr ) 44a to-220ab/7 1 7 standard 1 7 straight leads 1 7 smd
bts 612 n1 parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max semiconductor group 2 pin symbol function 1 out1 (load, l) output 1, protected high-side power output of channel 1 2 gnd logic ground 3 in1 input 1, activates channel 1 in case of logical high signal 4v bb positive power supply voltage, the tab is shorted to this pin 5st diagnostic feedback: open drain, low on failure 6 in2 input 2, activates channel 2 in case of logical high signal 7 out2 (load, l) output 2, protected high-side power output of channel 2 maximum ratings at t j = 25 c unless otherwise specified parameter symbol values unit supply voltage (overvoltage protection see page 4) v bb 43 v suppl y volta g e for full short circuit protection t j start =-40 ...+150c v bb 34 v load dump protection 2 ) v loaddump = u a + v s , u a = 13.5 v r i 3 ) = 2 w , r l = 5.3 w , t d = 200 ms, in= low or high v load dump 4 ) 60 v load current (short circuit current, see page 5) i l self-limited a operating temperature range storage temperature range t j t stg -40 ...+150 -55 ...+150 c power dissipation (dc), t c 25 c p tot 36 w inductive load switch-off ener gy dissipation, sin g le pulse v bb = 12v, t j, start = 150c, t c = 150c const. one channel, i l = 2.3 a, z l = 89 mh, 0 w : e as 290 mj both channels parallel, i l = 4.4 a, z l = 47 mh, 0 w : 580 see diagrams on page 9 electrostatic dischar g e capabilit y (esd) in: (human bod y model) all other pins: acc. mil-std883d, method 3015.7 and esd assn. std. s5.1-1993 v esd 1.0 2.0 kv input voltage (dc) v in -10 ... +16 v current through input pin (dc) current through status pin (dc) see internal circuit diagrams page 8 i in i st 2.0 5.0 ma 2 ) supply voltages higher than v bb(az) require an external current limit for the gnd and status pins, e.g. with a 150 w resistor in the gnd connection and a 15 k w resistor in series with the status pin. a resistor for the protection of the input is integrated. 3) r i = internal resistance of the load dump test pulse generator 4) v load dump is setup without the dut connected to the generator per iso 7637-1 and din 40839
bts 612 n1 parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max semiconductor group 3 thermal characteristics parameter and conditions s y mbol values unit min typ max thermal resistance chip - case, both channels: each channel: junction - ambient (free air): r thjc r thja -- -- -- -- -- -- 3.5 7.0 75 k/w smd version, device on pcb 5) :37 electrical characteristics parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max load switching capabilities and characteristics on-state resistance (pin 4 to 1 or 7) i l = 1.8 a t j =25 c: each channel t j =150 c: r on -- 160 320 200 400 m w nominal load current, iso norm (pin 4 to 1 or 7) v on = 0.5 v, t c = 85 c each channel: both channels parallel: i l(iso) 1.8 3.5 2.3 4.4 -- -- a output current (pin 1 or 7) while gnd disconnected or gnd pulled up, v bb =30 v, v in = 0, see diagram page 9 i l(gndhigh) -- -- 10 ma turn-on time in to 90% v out : turn-off time in to 10% v out : r l = 12 w , t j =-40...+150c t on t off 80 80 200 200 400 400 m s slew rate on 10 to 30% v out , r l = 12 w , t j =-40...+150c d v /dt on 0.1 -- 1 v/ m s slew rate off 70 to 40% v out , r l = 12 w , t j =-40...+150c -d v /dt off 0.1 -- 1 v/ m s 5 ) device on 50mm*50mm*1.5mm epoxy pcb fr4 with 6cm 2 (one layer, 70 m m thick) copper area for v bb connection. pcb is vertical without blown air.
bts 612 n1 parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max semiconductor group 4 operating parameters operating voltage 6 ) t j =-40...+150c: v bb(on) 5.0 -- 34 v undervoltage shutdown t j =-40...+150c: v bb(under) 3.5 -- 5.0 v undervolta g e restart t j =-40...+25c: t j =+150c: v bb(u rst) -- -- 5.0 7.0 v undervolta g e restart of char g e pump see diagram page 12 v bb(ucp) -- 5.6 7.0 v undervolta g e h y steresis d v bb(under) = v bb(u rst) - v bb(under) d v bb(under) -- 0.2 -- v overvoltage shutdown t j =-40...+150c: v bb(over) 34 -- 43 v overvoltage restart t j =-40...+150c: v bb(o rst) 33 -- -- v overvoltage hysteresis t j =-40...+150c: d v bb(over) -- 0.5 -- v overvoltage protection 7 ) t j =-40...+150c: i bb =40 ma v bb(az) 42 47 -- v standby current (pin 4) , v in =0 t j =-40...+150c: i bb(off) -- 90 150 m a operating current (pin 2) 8) , v in =5 v both channels on, t j =-40...+150c, i gnd -- 0.6 1.2 ma operating current (pin 2) 8) one channel on, t j =-40...+150c:, i gnd -- 0.4 0.7 ma 6) at supply voltage increase up to v bb = 5.6 v typ without charge pump, v out ? v bb - 2 v 7) see also v on(cl) in table of protection functions and circuit diagram page 8. 8 ) add i st , if i st > 0, add i in , if v in >5.5 v
bts 612 n1 parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max semiconductor group 5 protection functions initial peak short circuit current limit (pin 4 to 1 or 7) i l(scp) t j =-40c: t j =25c: t j =+150c: 5.5 4.5 2.5 9.5 7.5 4.5 13 11 7 a repetitive short circuit shutdown current limit i l(scr) t j = t jt (see timing diagrams, page 11) -- 4 -- a output clamp (inductive load switch off) at v out = v bb - v on(cl) i l = 40 ma: v on(cl) 41 47 53 v thermal overload trip temperature t jt 150 -- -- c thermal hysteresis d t jt -- 10 -- k reverse battery (pin 4 to 2) 9 ) - v bb -- -- 32 v reverse battery voltage drop (v out > v bb ) i l = -1.9 a, each channel t j =150 c: -v on(rev) -- 610 -- mv diagnostic characteristics open load detection current (included in standby current i bb ( off ) ) i l(off) -- 30 -- m a open load detection voltage t j =-40..150c: v out(ol) 234v 9 ) requires 150 w resistor in gnd connection. the reverse load current through the intrinsic drain-source diode has to be limited by the connected load. note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. the temperature protection is not active during reverse current operation! input and status currents have to be limited (see max. ratings page 2 and circuit page 8).
bts 612 n1 parameter and conditions, each channel symbol values unit at t j = 25 c, v bb = 12 v unless otherwise specified min typ max semiconductor group 6 input and status feedback 10 ) input resistance t j =-40..150c, see circuit page 8 r i 2.5 3.5 6 k w input turn-on threshold voltage
bts 612 n1 semiconductor group 7 truth table in1 in2 out1 out2 st st bts611l1 BTS612N1 normal operation l l h h l h l h l l h h l h l h h h h h h h h h open load channel 1 l l h l h x z z h l h x h(l 11 ) ) h l l h h channel 2 l h x l l h l h x z z h h(l 11 ) ) h l l h h short circuit to v bb channel 1 l l h l h x h h h l h x l 12) h h(l 13 ) ) l h h channel 2 l h x l l h l h x h h h l 12) h h(l 13 ) ) l h h overtemperature both channel l x h l h x l l l l l l h l l h l l channel 1 l h x x l l x x h l h l channel 2 x x l h x x l l h l h l undervoltage/ overvoltage x x l l h h l = "low" level x = don't care z = high impedance, potential depends on external circuit h = "high" level status signal after the time delay shown in the diagrams (see fig 5. page 12) 11 ) with additional external pull up resistor 12) an external short of output to v bb , in the off state, causes an internal current from output to ground. if r gnd is used, an offset voltage at the gnd and st pins will occur and the v st low signal may be errorious. 13 ) low resistance to v bb may be detected in the on-state by the no-load-detection
bts 612 n1 semiconductor group 8 terms profet v in2 st out2 gnd bb v st v in1 i st i in1 v bb i bb i l2 v out2 i gnd v on2 1 2 4 3 5 in1 v in2 i in2 v out1 v on1 i l1 out1 6 7 r gnd input circuit (esd protection) in gnd i r esd-zd i i i esd zener diodes are not to be used as voltage clamp at dc conditions. operation in this mode may result in a drift of the zener voltage (increase of up to 1 v). status output st gnd esd- zd +5v r st(on) esd-zener diode: 6.1 v typ., max 5 ma; r st(on) < 380 w at 1.6 ma, esd zener diodes are not to be used as voltage clamp at dc conditions. operation in this mode may result in a drift of the zener voltage (increase of up to 1 v). inductive and overvoltage output clamp + v bb out gnd profet v z v on v on clamped to 47 v typ. overvolt. and reverse batt. protection + v bb in2 st st r gnd gnd r signal gnd logic v z2 in1 r i v z1 v z1 = 6.1 v typ., v z2 = 47 v typ., r i = 3.5 k w typ , r gnd = 150 w open-load detection off-state diagnostic condition: v out > 3 v typ.; in low open load detection logic unit v out signal gnd i l(ol) off
bts 612 n1 semiconductor group 9 gnd disconnect profet v in2 st out2 gnd bb v bb i bb 1 2 4 3 5 in1 out1 6 7 v in1 v in2 v st v gnd any kind of load. in case of input=high is v out ? v in - v in(t+) . due to v gnd >0, no v st = low signal available. gnd disconnect with gnd pull up profet v in2 st out2 gnd bb v bb 1 2 4 3 5 in1 out1 6 7 v in1 v in2 v st v gnd any kind of load. if v gnd > v in - v in(t+) device stays off due to v gnd >0, no v st = low signal available. v bb disconnect with energized inductive load profet v in2 st out2 gnd bb v bb 1 2 4 3 5 in1 out1 6 7 high normal load current can be handled by the profet itself. v bb disconnect with charged external inductive load profet v in2 st out2 gnd bb 1 2 4 3 5 in1 out1 6 7 v bb high d if other external inductive loads l are connected to the profet, additional elements like d are necessary. inductive load switch-off energy dissipation profet v in st out gnd bb = e e e e as bb l r e load l r l { z l energy stored in load inductance: e l = 1 / 2 l i 2 l while demagnetizing load inductance, the energy dissipated in profet is e as = e bb + e l - e r = v on(cl) i l (t) dt, with an approximate solution for r l > 0 w : e as = i l l 2 r l ( v bb + |v out(cl) |) ln (1+ i l r l |v out(cl) | )
bts 612 n1 semiconductor group 10 maximum allowable load inductance for a single switch off (both channels parallel) l = f (i l ); t j,start = 150c, t c = 150c const., v bb = 12 v, r l = 0 w l [mh] 1 10 100 1000 2345678 i l [a] typ. transient thermal impedance chip case z thjc = f (t p ), one channel active z thjc [k/w] 0.01 0.1 1 10 1e-5 1e-4 1e-3 1e-2 1e-1 1e0 1e1 0 0.01 0.02 0.05 0.1 0.2 0.5 d= t p [s] transient thermal impedance chip case z thjc = f (t p ), both channel active z thjc [k/w] 0.01 0.1 1 10 1e-5 1e-4 1e-3 1e-2 1e-1 1e0 1e1 0 0.01 0.02 0.05 0.1 0.2 0.5 d= t p [s]
bts 612 n1 semiconductor group 11 timing diagrams both channels are symmetric and consequently the diagrams are valid for each channel as well as for permuted channels figure 1a: v bb turn on: in2 v out1 t v bb st open drain in1 v out2 figure 2a: switching a lamp: in st out l t v i figure 2b: switching an inductive load in st l t v i out figure 3a: short circuit shut down by overtempertature, reset by cooling in st l t i other channel: normal operation l(scr) i i l(scp) heating up may require several milliseconds, depending on external conditions
bts 612 n1 semiconductor group 12 figure 4a: overtemperature: reset if t j < t jt in st out j t v t figure 5a: open load: detection in off-state, turn on/off to open load out1 t v st in1 i l1 t d(st ol3) t d(st ol3) in2 channel 2: normal operation channel 1: open load t d(st,ol3) depends on external circuitry because of high impedance *) i l = 30 m a typ figure 6a: undervoltage: in v out t v bb st open drain v v bb(under) bb(u rst) bb(u cp) v figure 6b: undervoltage restart of charge pump bb(under) v v bb(u rst) v bb(over) v bb(o rst) v bb(u cp) off-state on-state v on(cl) v bb v on off-state charge pump starts at v bb(ucp) =5.6 v typ.
bts 612 n1 semiconductor group 13 figure 7a: overvoltage: in v out t v bb st on(cl) v v bb(over) v bb(o rst)
bts 612 n1 semiconductor group 14 package and ordering code all dimensions in mm standard to-220ab/7 ordering code BTS612N1 q67060-s6303-a2 to 220ab/7, opt. e3230 ordering code BTS612N1 e3230 q67060-s6303-a3 smd to 220ab/7, opt. e3128 ordering code BTS612N1 e3128a t&r: q67060-s6303-a4 changed since 04.96 date change dec 1996 t d ( st ol4 ) max reduced from 1500 to 800 s, t y pical from 400 to 320 s, min limit unchanged e as maximum ratin g and dia g ram and z thjc diagram added esd capability increased t y p. reverse batter y volta g e drop - v on(rev) added components used in life-support devices or systems must be expressly authorised for such purpose! critical components 14 ) of the semiconductor group of siemens ag, may only be used in life supporting devices or systems 15 ) with the express written approval of the semiconductor group of siemens ag. 14) a critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 15) life support devices or systems are intended (a) to be implanted in the human body or (b) support and/or maintain and sustain and/or protect human life. if they fail, it is reasonably to assume that the health of the user or other persons may be endangered.

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